文件名称：Quartus_II（ALTERA培训资料）.ppt
文件大小：5.24MB
文件格式：PPT
更新时间：2022-12-11 04:17:12
Quartus
Create a New Quartus II Project Compile a Design into an FPGA Locate Resulting Compilation Information Assign Design Constraints (Timing & Pin) Perform Timing Analysis & Obtain Results Configure an FPGA Create Simulation Waveform & Simulate a Design