系统时钟和定时器

时间:2022-05-27 21:03:20

一、

系统时钟和定时器系统时钟和定时器
@******************************************************************************
@ File:head.S
@ 功能:初始化,设置中断模式、系统模式的栈,设置好中断处理函数
@******************************************************************************       
   
.extern     main
.text 
.global _start 
_start:
@******************************************************************************       
@ 中断向量,本程序中,除Reset和HandleIRQ外,其它异常都没有使用
@******************************************************************************       
    b   Reset

@ 0x04: 未定义指令中止模式的向量地址
HandleUndef:
    b   HandleUndef 
 
@ 0x08: 管理模式的向量地址,通过SWI指令进入此模式
HandleSWI:
    b   HandleSWI

@ 0x0c: 指令预取终止导致的异常的向量地址
HandlePrefetchAbort:
    b   HandlePrefetchAbort

@ 0x10: 数据访问终止导致的异常的向量地址
HandleDataAbort:
    b   HandleDataAbort

@ 0x14: 保留
HandleNotUsed:
    b   HandleNotUsed

@ 0x18: 中断模式的向量地址
    b   HandleIRQ

@ 0x1c: 快中断模式的向量地址
HandleFIQ:
    b   HandleFIQ

Reset:                  
    ldr sp, =4096           @ 设置栈指针,以下都是C函数,调用前需要设好栈
    bl  disable_watch_dog   @ 关闭WATCHDOG,否则CPU会不断重启
    bl  clock_init          @ 设置MPLL,改变FCLK、HCLK、PCLK,设置时钟。
    bl  memsetup            @ 设置存储控制器以使用SDRAM
    bl  copy_steppingstone_to_sdram     @ 复制代码到SDRAM中
    ldr pc, =on_sdram                   @ 跳到SDRAM中继续执行
on_sdram:
    msr cpsr_c, #0xd2       @ 进入中断模式
    ldr sp, =4096           @ 设置中断模式栈指针

    msr cpsr_c, #0xdf       @ 进入系统模式
    ldr sp, =0x34000000     @ 设置系统模式栈指针,

    bl  init_led            @ 初始化LED的GPIO管脚
    bl  timer0_init         @ 初始化定时器0   
    bl  init_irq            @ 调用中断初始化函数,在init.c中
    msr cpsr_c, #0x5f       @ 设置I-bit=0,开IRQ中断
    
    ldr lr, =halt_loop      @ 设置返回地址
    ldr pc, =main           @ 调用main函数
halt_loop:
    b   halt_loop

HandleIRQ:
    sub lr, lr, #4                  @ 计算返回地址
    stmdb   sp!,    { r0-r12,lr }   @ 保存使用到的寄存器
                                    @ 注意,此时的sp是中断模式的sp
                                    @ 初始值是上面设置的4096
    
    ldr lr, =int_return             @ 设置调用ISR即EINT_Handle函数后的返回地址  
    ldr pc, =Timer0_Handle          @ 调用中断服务函数,在interrupt.c中
int_return:
    ldmia   sp!,    { r0-r12,pc }^  @ 中断返回, ^表示将spsr的值复制到cpsr
    
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二、

系统时钟和定时器系统时钟和定时器
  1 /*
  2  * init.c: 进行一些初始化
  3  */ 
  4 
  5 #include "s3c24xx.h"
  6  
  7 void disable_watch_dog(void);
  8 void clock_init(void);
  9 void memsetup(void);
 10 void copy_steppingstone_to_sdram(void);
 11 void init_led(void);
 12 void timer0_init(void);
 13 void init_irq(void);
 14 
 15 /*
 16  * 关闭WATCHDOG,否则CPU会不断重启
 17  */
 18 void disable_watch_dog(void)
 19 {
 20     WTCON = 0;  // 关闭WATCHDOG很简单,往这个寄存器写0即可
 21 }
 22 
 23 
 24 
 25 //设置MPLL
 26 #define S3C2410_MPLL_200MHZ     ((0x5c<<12)|(0x04<<4)|(0x00))              
 27 #define S3C2440_MPLL_200MHZ     ((0x5c<<12)|(0x01<<4)|(0x02))           //MDIV[19:12]=1011100=92,PDIV[9:4]=100=4,SDIV[1:0]=00=0
 28 /*
 29  * 对于MPLLCON寄存器,[19:12]为MDIV,[9:4]为PDIV,[1:0]为SDIV
 30  * 有如下计算公式:
 31  *  S3C2410: MPLL(FCLK) = (m * Fin)/(p * 2^s)
 32  *  S3C2410: MPLL(FCLK) = (2 * m * Fin)/(p * 2^s)
 33  *  其中: m = MDIV + 8, p = PDIV + 2, s = SDIV
 34  * 对于本开发板,Fin = 12MHz
 35  * 设置CLKDIVN,令分频比为:FCLK:HCLK:PCLK=1:2:4,
 36  * FCLK=200MHz,HCLK=100MHz,PCLK=50MHz
 37  */
 38  
 39  
 40 //设置分频 
 41 void clock_init(void)         
 42 {
 43     // LOCKTIME = 0x00ffffff;   // 使用默认值即可,设置MPLL寄存器后,等待时间LOCKTIME默认,MPLL输出稳定
 44     CLKDIVN  = 0x03;            // FCLK:HCLK:PCLK=1:2:4, HDIVN=1,PDIVN=1;时钟分频控制寄存器CLKDIVN,设置分频
 45 
 46     /* 如果HDIVN非0,CPU的总线模式应该从“fast bus mode”变为“asynchronous bus mode” */ 
 47 __asm__(
 48     "mrc    p15, 0, r1, c1, c0, 0\n"        /* 读出控制寄存器 */ 
 49     "orr    r1, r1, #0xc0000000\n"          /* 设置为“asynchronous bus mode” */
 50     "mcr    p15, 0, r1, c1, c0, 0\n"        /* 写入控制寄存器 */
 51     );
 52 
 53     /* 判断是S3C2410还是S3C2440 */
 54     if ((GSTATUS1 == 0x32410000) || (GSTATUS1 == 0x32410002))
 55     {
 56         MPLLCON = S3C2410_MPLL_200MHZ;  /* 现在,FCLK=200MHz,HCLK=100MHz,PCLK=50MHz */
 57     }
 58     else
 59     {
 60         MPLLCON = S3C2440_MPLL_200MHZ;  /* 现在,FCLK=200MHz,HCLK=100MHz,PCLK=50MHz */
 61     }       
 62 }
 63 
 64 
 65 
 66 /*
 67  * 设置存储控制器以使用SDRAM
 68  */
 69 void memsetup(void)
 70 {
 71     volatile unsigned long *p = (volatile unsigned long *)MEM_CTL_BASE;
 72 
 73     /* 这个函数之所以这样赋值,而不是像前面的实验(比如mmu实验)那样将配置值
 74      * 写在数组中,是因为要生成”位置无关的代码”,使得这个函数可以在被复制到
 75      * SDRAM之前就可以在steppingstone中运行
 76      */
 77     /* 存储控制器13个寄存器的值 */
 78     p[0] = 0x22011110;     //BWSCON
 79     p[1] = 0x00000700;     //BANKCON0
 80     p[2] = 0x00000700;     //BANKCON1
 81     p[3] = 0x00000700;     //BANKCON2
 82     p[4] = 0x00000700;     //BANKCON3  
 83     p[5] = 0x00000700;     //BANKCON4
 84     p[6] = 0x00000700;     //BANKCON5
 85     p[7] = 0x00018005;     //BANKCON6
 86     p[8] = 0x00018005;     //BANKCON7
 87     
 88     /* REFRESH,
 89      * HCLK=12MHz:  0x008C07A3,
 90      * HCLK=100MHz: 0x008C04F4
 91      */ 
 92     p[9]  = 0x008C04F4;
 93     p[10] = 0x000000B1;     //BANKSIZE
 94     p[11] = 0x00000030;     //MRSRB6
 95     p[12] = 0x00000030;     //MRSRB7
 96 }
 97 
 98 
 99 
100 
101 //复制代码到SDRAM
102 void copy_steppingstone_to_sdram(void)
103 {
104     unsigned int *pdwSrc  = (unsigned int *)0;
105     unsigned int *pdwDest = (unsigned int *)0x30000000;
106     
107     while (pdwSrc < (unsigned int *)4096)
108     {
109         *pdwDest = *pdwSrc;
110         pdwDest++;
111         pdwSrc++;
112     }
113 }
114 
115 
116 
117 
118 
119 
120 /*
121  * LED1-4对应GPB5、GPB6、GPB7、GPB8
122  * 配置引脚为输出
123  */
124 #define GPB5_out        (1<<(5*2))      // LED1
125 #define GPB6_out        (1<<(6*2))      // LED2
126 #define GPB7_out        (1<<(7*2))      // LED3
127 #define GPB8_out        (1<<(8*2))      // LED4
128 
129 /*
130  * K1-K4对应GPG11、GPG3、GPF2、GPF3
131  */
132 #define GPG11_eint      (2<<(11*2))     // K1,EINT19
133 #define GPG3_eint       (2<<(3*2))      // K2,EINT11
134 #define GPF3_eint       (2<<(3*2))      // K3,EINT3
135 #define GPF2_eint       (2<<(2*2))      // K4,EINT2
136  
137 void init_led(void)
138 {
139     GPBCON = GPB5_out | GPB6_out | GPB7_out | GPB8_out ;
140 }
141 
142 
143 
144 
145 
146 // 用定时器0设置0.5s产生一次中断
147 /*
148  * Timer input clock Frequency = PCLK / {prescaler value+1} / {divider value}
149  * {prescaler value} = 0~255
150  * {divider value} = 2, 4, 8, 16
151  * 本实验的Timer0的时钟频率=100MHz/(99+1)/(16)=62500Hz
152  * 设置Timer0 0.5秒钟触发一次中断:
153  */
154 void timer0_init(void)
155 {
156     TCFG0  = 99;        // 预分频器0 = 99        
157     TCFG1  = 0x03;      // 选择16分频
158     TCNTB0 = 31250;     // 0.5秒钟触发一次中断
159     TCON   |= (1<<1);   // 手动更新
160     TCON   = 0x09;      // 自动加载,清“手动更新”位,启动定时器0
161 }
162 
163 /*
164  * 定时器0中断使能,中断屏蔽寄存器屏蔽位设置为0,使能
165  */ 
166 void init_irq(void)
167 {        
168     // 定时器0中断使能
169     INTMSK   &= (~(1<<10));
170 }
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三、

系统时钟和定时器系统时钟和定时器
 1 #include "s3c24xx.h"
 2 
 3 
 4 
 5 //发生中断时,处理的函数
 6 void Timer0_Handle(void)
 7 {
 8     /*
 9      * 每次中断令4个LED改变状态
10      */
11     if(INTOFFSET == 10)
12     {
13         GPBDAT = ~(GPBDAT & (0xf << 5));
14     }
15     //清中断
16     SRCPND = 1 << INTOFFSET;
17     INTPND = INTPND;     
18 }
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四、

系统时钟和定时器系统时钟和定时器
1 void EINT_Handle();
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五、

系统时钟和定时器系统时钟和定时器
1 int main(void)
2 {
3     while(1);
4     return 0;
5 }
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六、

系统时钟和定时器系统时钟和定时器
 1 objs := head.o init.o interrupt.o main.o
 2 
 3 timer.bin: $(objs)
 4     arm-linux-ld -Ttimer.lds -o timer_elf $^
 5     arm-linux-objcopy -O binary -S timer_elf $@
 6     arm-linux-objdump -D -m arm timer_elf > timer.dis
 7     
 8 %.o:%.c
 9     arm-linux-gcc -Wall -O2 -c -o $@ $<
10 
11 %.o:%.S
12     arm-linux-gcc -Wall -O2 -c -o $@ $<
13 
14 clean:
15     rm -f timer.bin timer_elf timer.dis *.o        
16     
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七、

系统时钟和定时器系统时钟和定时器
1 /*连接函数*/
2 
3 SECTIONS {
4     . = 0x30000000;
5     .text          :   { *(.text) }
6     .rodata ALIGN(4) : {*(.rodata)} 
7     .data ALIGN(4) : { *(.data) }
8     .bss ALIGN(4)  : { *(.bss)  *(COMMON) }
9 }
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八、

系统时钟和定时器系统时钟和定时器
 1 /* WOTCH DOG register */
 2 #define     WTCON           (*(volatile unsigned long *)0x53000000)
 3 
 4 /* SDRAM regisers */
 5 #define     MEM_CTL_BASE    0x48000000
 6 #define     SDRAM_BASE      0x30000000
 7 
 8 /* NAND Flash registers */
 9 #define NFCONF              (*(volatile unsigned int  *)0x4e000000)
10 #define NFCMD               (*(volatile unsigned char *)0x4e000004)
11 #define NFADDR              (*(volatile unsigned char *)0x4e000008)
12 #define NFDATA              (*(volatile unsigned char *)0x4e00000c)
13 #define NFSTAT              (*(volatile unsigned char *)0x4e000010)
14 
15 /*GPIO registers*/
16 #define GPBCON              (*(volatile unsigned long *)0x56000010)
17 #define GPBDAT              (*(volatile unsigned long *)0x56000014)
18 
19 #define GPFCON              (*(volatile unsigned long *)0x56000050)
20 #define GPFDAT              (*(volatile unsigned long *)0x56000054)
21 #define GPFUP               (*(volatile unsigned long *)0x56000058)
22 
23 #define GPGCON              (*(volatile unsigned long *)0x56000060)
24 #define GPGDAT              (*(volatile unsigned long *)0x56000064)
25 #define GPGUP               (*(volatile unsigned long *)0x56000068)
26 
27 #define GPHCON              (*(volatile unsigned long *)0x56000070)
28 #define GPHDAT              (*(volatile unsigned long *)0x56000074)
29 #define GPHUP               (*(volatile unsigned long *)0x56000078)
30 
31 
32 
33 /*UART registers*/
34 #define ULCON0              (*(volatile unsigned long *)0x50000000)
35 #define UCON0               (*(volatile unsigned long *)0x50000004)
36 #define UFCON0              (*(volatile unsigned long *)0x50000008)
37 #define UMCON0              (*(volatile unsigned long *)0x5000000c)
38 #define UTRSTAT0            (*(volatile unsigned long *)0x50000010)
39 #define UTXH0               (*(volatile unsigned char *)0x50000020)
40 #define URXH0               (*(volatile unsigned char *)0x50000024)
41 #define UBRDIV0             (*(volatile unsigned long *)0x50000028)
42 
43 
44 /*interrupt registes*/
45 #define SRCPND              (*(volatile unsigned long *)0x4A000000)
46 #define INTMOD              (*(volatile unsigned long *)0x4A000004)
47 #define INTMSK              (*(volatile unsigned long *)0x4A000008)
48 #define PRIORITY            (*(volatile unsigned long *)0x4A00000c)
49 #define INTPND              (*(volatile unsigned long *)0x4A000010)
50 #define INTOFFSET           (*(volatile unsigned long *)0x4A000014)
51 #define SUBSRCPND           (*(volatile unsigned long *)0x4A000018)
52 #define INTSUBMSK           (*(volatile unsigned long *)0x4A00001c)
53 
54 /*external interrupt registers*/
55 #define EINTMASK            (*(volatile unsigned long *)0x560000a4)
56 #define EINTPEND            (*(volatile unsigned long *)0x560000a8)
57 
58 /*clock registers*/
59 #define    LOCKTIME        (*(volatile unsigned long *)0x4c000000)
60 #define    MPLLCON        (*(volatile unsigned long *)0x4c000004)
61 #define    UPLLCON        (*(volatile unsigned long *)0x4c000008)
62 #define    CLKCON        (*(volatile unsigned long *)0x4c00000c)
63 #define    CLKSLOW        (*(volatile unsigned long *)0x4c000010)
64 #define    CLKDIVN        (*(volatile unsigned long *)0x4c000014)
65 
66 
67 /*PWM & Timer registers*/
68 #define    TCFG0        (*(volatile unsigned long *)0x51000000)
69 #define    TCFG1        (*(volatile unsigned long *)0x51000004)
70 #define    TCON        (*(volatile unsigned long *)0x51000008)
71 #define    TCNTB0        (*(volatile unsigned long *)0x5100000c)
72 #define    TCMPB0        (*(volatile unsigned long *)0x51000010)
73 #define    TCNTO0        (*(volatile unsigned long *)0x51000014)
74 
75 #define GSTATUS1    (*(volatile unsigned long *)0x560000B0)
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